System-on-chip Design, 7.5 credits

Main field of study with advanced study

The courses Switching Theory and Digital Design 7.5 credits and Computer Systems Engineering I 7.5 credits. 30 credits mathematics or courses including calculus, linear algebra and transform methods. English 6. Exemption of the requirement in Swedish is granted.

The course is included in the programs Electrical Engineer, 180 credits, Computer Science and Engineering, 300 credits and Intelligent Systems , 300 hp.

With technological advances that allow us to integrate complete multi-processor systems on a single die, Systems-on-Chip (SoCs) are at the core of most embedded computing and consumer devices, such as cell phones, media players and automotive, aerospace or medical electronics. This course will provide an understanding of the concepts, issues, and process of designing highly integrated SoCs following systematic hardware/software co-design & co-verification principles using state-of-the-art synthesis and verification tools and design flows.

Upon completion of the course, the student shall be able to:

Knowledge and understanding

• Understand hardware, software, and interface synthesis with emphasis on issues in interface design
• Describe examples of applications and systems developed using a co-design approach

Skills and ability

• Model and specify embedded systems at high levels of abstraction
• Analyse the functional and non-functional performance of the system early in the design process to support design decisions
• Analyse hardware/software trade offs, algorithms, and architectures to optimize the system based on requirements and implementation constraints
• Use co-simulation to validate system functionality

Judgement and approach

• Discuss issues in system-on-a-chip design associated with co-design, such as intellectual property, reuse, and verification
• Evaluate architectures for control-dominated and data-dominated systems

The course is divided into a lecture part, a laboratory part including a small project, and a seminar presenting the project.

The lecture part presents the fundamentals of System-level and SoC design methodologies and tools. It will cover topics related to HW/SW Co-design such as analysis, partitioning, real-time scheduling, hardware acceleration, and FPGAs for prototyping of HW/SW systems. This part also provides an overview of state of the art High-Level Synthesis (HLS) tools and techniques such as allocation, scheduling, binding, resource sharing, pipelining.

The laboratory part provides hands-on experience of SoC and IP development, integration, testing and verification.

In the seminar part of the course, course participants make detailed studies of their project work and present their findings to their peers.

Instruction is in the form of lectures, laboratory sessions, project tutoring and seminar. The laboratory exercises and project shall be documented in short reports.

Examination of the course is by evaluating student performance in labs and project. The student also needs to make the seminar presentation to pass the course. The quality of the specific work in labs, project and seminar is weighed into the final grade.

The laboratory exercises and project are obligatory parts of the course.

If there are special reasons, the examiner may make exceptions from the specified examination format and allow a student to be examined in another way. Special reasons can e.g. be study support for students with disabilities.

Course evaluation is part of the course. This evaluation offers guidance in the future development and planning of the course. Course evaluation is documented and made available to the students.